Senior Engineer (Logic Pathfinding)
Samsung Semiconductor, San Jose
Phone: +1 (650)-272-1873
E-mail: aravindhk947@gmail.com
About me
About me
I am a Senior Engineer in the Logic Pathfinding Lab at Samsung Semiconductor, San Jose.
Education
Education
PhD in Electrical Engineering, Stanford University, 2022 (Defense, Thesis)
Advisor: Prof. Krishna Saraswat
MS in Electrical Engineering, Stanford University, 2018
B.Tech. (Honors) in Electrical Engineering, IIT Bombay, 2016
Minor degrees in Physics and Computer Science
Research
Research
My research interests include -
Low-resistance contacts to two-dimensional (2D) semiconductors
Doping of 2D Semiconductors
Computational study of metal-semiconductor interfaces
Oxide electronics